21.9.6 TxRST

Name:	TxRST
Offset:	0xFC0,0xFBA,0xFB4

Timer External Reset Signal Selection Register


Bit	7	6	5	4	3	2	1	0
					RSEL[3:0]
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0

Bits 3:0 – RSEL[3:0]

External Reset Source Selection Bits

Table 21-4. External Reset Sources
RSEL[3:0]	Reset Source
RSEL[3:0]	TMR2	TMR4	TMR6
`1011-1111`	Reserved	Reserved	Reserved
`1010`	ZCD_OUT	ZCD_OUT	ZCD_OUT
`1001`	CMP2OUT	CMP2OUT	CMP2OUT
`1000`	CMP1OUT	CMP1OUT	CMP1OUT
`0111`	PWM4OUT	PWM4OUT	PWM4OUT
`0110`	PWM3OUT	PWM3OUT	PWM3OUT
`0101`	CCP2OUT	CCP2OUT	CCP2OUT
`0100`	CCP1OUT	CCP1OUT	CCP1OUT
`0011`	TMR6 post-scaled	TMR6 post-scaled	Reserved
`0010`	TMR4 post-scaled	Reserved	TMR4 post-scaled
`0001`	Reserved	TMR2 post-scaled	TMR2 post-scaled
`0000`	Pin selected by T2INPPS	Pin selected by T4INPPS	Pin selected by T6INPPS

Value	Description
n	See the External Reset Sources table

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