15.13.6 PIR4
| Name: | PIR4 |
| Offset: | 0xECE |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TMR6IF | TMR5IF | TMR4IF | TMR3IF | TMR2IF | TMR1IF | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 5 – TMR6IF TMR6 to PR6 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR6 to PR6 match occurred (must be cleared in software) |
| 0 | No TMR6 to PR6 match occurred |
Bit 4 – TMR5IF TMR5 Overflow Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR5 register overflowed (must be cleared in software) |
| 0 | TMR5 register did not overflow |
Bit 3 – TMR4IF TMR4 to PR4 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR4 to PR4 match occurred (must be cleared in software) |
| 0 | No TMR4 to PR4 match occurred |
Bit 2 – TMR3IF TMR3 Overflow Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR3 register overflowed (must be cleared in software) |
| 0 | TMR3 register did not overflow |
Bit 1 – TMR2IF TMR2 to PR2 Match Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR2 to PR2 match occurred (must be cleared in software) |
| 0 | No TMR2 to PR2 match occurred |
Bit 0 – TMR1IF TMR1 Overflow Interrupt Flag bit
| Value | Description |
|---|---|
| 1 | TMR1 register overflowed (must be cleared in software) |
| 0 | TMR1 register did not overflow |