7.5.2 Integrated Oscillator Setup

Using the internal oscillator, the oscillation frequency depends on the load capacitance between the crystal pin 2 (XTAL1) and pin 1 (XTAL2) of ATSAMR30E18A. The total load capacitance C_L must be equal to the specified load capacitance of the crystal itself. It consists of the internal capacitors CX and parasitic capacitances connected to the XTAL nodes inside the module.

The figure below shows all parasitic capacitances, such as PCB stray capacitances and the pin input capacitance, summarized to C_PAR.

Additional internal trimming capacitors C_TRIM are available. Any value in the range from 0 pF to 4.5 pF with a 0.3 pF resolution is selectable using the XTAL_TRIM bits in the XOSC_CTRL register (XOSC_CTRL.XTAL_TRIM). To calculate the total load capacitance, the following formula can be used:

C_L[pF] = 0.5 x (CX[pF] + C_TRIM[pF] + C_PAR[pF]).

The ATSAMR30E18A trimming capacitors provide the possibility of reducing frequency deviations caused by production process variations or by external components’ tolerances. Note that the oscillation frequency can only be reduced by increasing the trimming capacitance. The frequency deviation caused by one step of C_TRIM decreases with increasing crystal load capacitor values.

An amplitude control circuit is included to ensure stable operation under different operating conditions and for different crystal types. Enabling the crystal oscillator in P_ON state and after leaving SLEEP state causes a slightly higher current during the amplitude build-up phase to ensure a short start-up time. At stable operation, the current is reduced to the amount necessary for a robust operation. This also keeps the drive level of the crystal low.

The XTAL_TRIM value is determined during the production test and stored in NVM user row. This value needs to be loaded into the register during initialization. For more details, see NVM Information.