2.13 High Speed Serial Interface Configuration Path - SmartFusion2

The configuration register data are used by the CMSIS::SystemInit() function compiled with your firmware application code. The SystemInit() function is run before the user main() function in your application. The Peripheral Initialization solution requires that, in addition to specifying High Speed Serial Interface Configuration register values, you configure the APB configuration data path in the MSS (FIC_2).

The SystemInit() function writes the data to the High Speed Serial Interface configuration registers via the FIC_2 APB interface.

Figure 2-8. FIC_2 Configurator Overview
To configure the FIC_2 interface:
  1. Open the FIC_2 configurator dialog box (Figure 2-8) from the MSS configurator.
  2. Select Initialize peripherals using Cortex-M3. Ensure to click the check box to enable Fabric DDR and/or SerDes blocks and the MSS DDR option, if you use.
  3. Click OK to save your settings. This exposes the FIC_2 configuration ports (Clock, Reset, and APB bus interfaces), as shown in Figure 2-9.
  4. Generate MSS. The FIC_2 ports (FIC_2_APB_MASTER, FIC_2_APB_M_PCLK, and FIC_2_APB_M_RESET_N) are now exposed at the MSS interface and can be connected to the CoreSF2Config and CoreSF2Reset as per the Peripheral Initialization solution specification.

For details on configuring and connecting the CoreSF2Config and CoreSF2Reset cores, see SmartFusion2 DDR Controller and Serial High Speed Controller Initialization Methodology.

Figure 2-9. FIC_2 Ports