3.7 XAUI Ports
The following table lists the various XAUI ports.
| Ports | Direction |
|---|---|
| XAUI_RXD[63:0] | OUT |
| XAUI_RXC[7:0] | OUT |
| XAUI_RX_CLK | OUT |
| XAUI_VNDRESLO[31:0] | OUT |
| XAUI_VNDRESHI[31:0] | OUT |
| XAUI_MMD_MDC | IN |
| XAUI_MMD_MDI | IN |
| XAUI_MMD_MDI_EXT | IN |
| XAUI_MMD_MDOE_IN | IN |
| XAUI_MMD_PRTAD[4:0] | IN |
| XAUI_MMD_DEVID[4:0] | IN |
| XAUI_LOOPBACK_IN | IN |
| XAUI_MDC_RESET | IN |
| XAUI_TX_RESET | IN |
| XAUI_RX_RESET | IN |
| XAUI_TXD[63:0] | IN |
| XAUI_TXC[7:0] | IN |
| XAUI_MMD_MDO | OUT |
| XAUI_MMD_MDOE | OUT |
| XAUI_LOWPOWER | OUT |
| XAUI_LOOPBACK_OUT | OUT |
| XAUI_MDC_RESET_OUT | OUT |
| XAUI_TX_RESET_OUT | OUT |
| XAUI_RX_RESET_OUT[3:0] | OUT |
| CORE_RESET_N | IN |
| PHY_RESET_N | IN |
| SPLL_LOCK | OUT |
| PLL_LOCK_INT | OUT |
| PLL_LOCKLOST_INT | OUT |
| XAUI_OUT_CLK | OUT |
| XAUI_PMA_READY_N | OUT |
| REFCLK<x>_OUT where x can be 0 or 1 depending on whether REFCLK0 or REFCLK1 is selected as the Reference Clock Source. | OUT |