3.5.4.1 Overview

The power amplifier of the ATA8510/15 works as a push-pull circuit according to the following figure. The current sources are switched between source and sink operation with the TX frequency, fTX.

The current value of these sources can be programmed with the RF front-end register FEPAC.PACR[5:0]. By using appropriate current source settings and suitable transformation of the load impedance, the current consumption for required output power is minimized (see parameters no. 10.50 in RF Receiving Characteristics, 10.90 and 11.30 in RF Transmit Characteristics). The voltage at the RF_OUT pin is bounded between GND and VS_PA and the average output voltage is about VS_PA/2. Changing the values of L15 and C5 may help to balance output power against H3 harmonics. While the output power degrades only slightly, the H3 harmonics can be decreased by several dB.
Figure 3-29. Power Amplifier Block Diagram

After the fractional-N PLL is locked, the internal biasing of the power amplifier is switched by using the RF front-end register FEEN2.PAEN = 1. This bit setting enables the biasing of the block but not the current sources. The current sources and the related RF carrier are switched on with the FSCR register after FEEN2.PAEN = 1.

The tolerances of the current sources are calibrated with the RF front-end register FETN4.RTN4[3:0]. The calibration data is located in the factory-locked EEPROM and must be copied to the RF front-end register before activating the power amplifier.

The current source setting must be done in the RF front-end register, FEPAC, before activating the power amplifier.