3.5.4.2 Power Setting and Matching to a 50Ω Load

By setting different values for the current sources using the RF front-end register FEPAC.PACR[5:0], the current of the sources can be adjusted for output power values between -12 dBm and +14.5 dBm. The output power shown in the following table can be achieved with an optimum load transformation using L15, C5 and C16 on the application board, as described in Application Board Design.

Table 3-42. Output Power with Optimized Load for VS_PA = 3V

FEPAC.PACR [5:0]

POUT/dBm Low-Band

POUT/dBm High-Band

FEPAC.PACR [5:0]

POUT/dBm Low-Band

POUT/dBm High-Band

0

-11.80

-12.90

32

4.72

4.08

1

-11.30

-12.33

33

5.09

4.51

2

-10.70

-11.76

34

5.57

5.01

3

-10.20

-11.10

35

6.00

5.42

4

-9.70

-10.60

36

6.41

5.79

5

-9.20

-10.00

37

6.77

6.27

6

-8.60

-9.50

38

7.19

6.70

7

-8.00

-9.00

39

7.55

7.11

8

-7.50

-8.50

40

7.98

7.47

9

-7.00

-7.90

41

8.40

7.89

10

-6.40

-7.30

42

8.79

8.25

11

-5.90

-6.80

43

9.11

8.68

12

-5.30

-6.30

44

9.46

9.10

13

-4.77

-5.70

45

9.82

9.49

14

-4.17

-5.20

46

10.18

9.81

15

-3.67

-4.60

47

10.60

10.16

16

-3.12

-4.07

48

10.89

10.52

17

-2.56

-3.47

49

11.30

10.88

18

-2.10

-2.97

50

11.62

11.30

19

-1.58

-2.42

51

12.06

11.59

20

-1.08

-1.86

52

12.39

12.00

21

-0.50

-1.40

53

12.82

12.32

22

0.00

-0.88

54

13.22

12.76

23

0.41

-0.38

55

13.58

13.09

24

1.00

0.20

56

13.95

13.52

25

1.42

0.70

57

14.22

13.92

26

1.83

1.11

58

14.41

14.28

27

2.42

1.70

59

14.49

14.65

28

2.88

2.12

60

14.60

14,65

29

3.38

2.53

61

14.60

14.65

30

3.81

3.12

62

14.60

14.65

31

4.31

3.58

63

14.60

14.65

The following table shows the measured transformation of the power amplifier output to a 50Ω load connected to pin Ant1 of the application board as described in Application Board Design. The parameters no. 10.20 to 11.50 in RF Transmit Characteristics are measured with these transformations on the application board.

Note: For these measurements, L15 of Table 3-43 is placed on the C15 spot on the application board.
Table 3-43. Matching RF_OUT to Ant1 on Application Board without Using SPDT for VS_PA = 3V

Frequency/Output Power [MHz/dBm]

FEPAC. PACR [5:0]

L15

C5

C16

Inductor Toko

QL15 at fTX

SRFL15

315 MHz/6 dBm

35

47nH

3.3 pF

100 pF

LL1005FHL47N

16

1.5 GHz

315 MHz/10 dBm

46

27nH

3.3 pF

100 pF

LL1005FHL27N

19

2.1 GHz

315 MHz/14 dBm

56

15nH

10 pF

100 pF

LL1005FHL15N

19

2.8 GHz

433.92 MHz/6 dBm

35

33nH

5.6 pF

100 pF

LL1005FHL33N

20

2.1 GHz

433.92 MHz/10 dBm

46

22nH

4.7 pF

100 pF

LL1005FHL22N

22

2.5 GHz

433.92 MHz/14 dBm

56

10nH

6.8 pF

100 pF

LL1005FHL10N

24

4.3 GHz

868.3 MHz/6 dBm

36

8.2nH

3.9 pF

100 pF

LL1005FHL8N2

33

4.7 GHz

868.3 MHz/10 dBm

47

5.6nH

2.7 pF

100 pF

LL1005FHL5N6

32

6.1 GHz

868.3 MHz/14 dBm

57

2.7nH

3.3 pF

100 pF

LL1005FHL2N7

30

9.6 GHz

915 MHz/6 dBm

36

5.6nH

4.7 pF

100 pF

LL1005FHL5N6

33

6.1 GHz

915 MHz/10 dBm

47

3.9nH

3.3 pF

100 pF

LL1005FHL3N9

32

7.4 GHz

915 MHz/14 dBm

57

1.2nH

3.3 pF

100 pF

LL1005FHL1N2

28

16 GHz