16.4.3 Port A Data Direction
Register
When addressing I/O Registers as data space using LD
and ST instructions, the provided offset must be used. When using the I/O specific
commands IN and OUT, the offset is reduced by 0x20, resulting in an I/O address offset
within 0x00 - 0x3F.
| Name: | DDRA |
| Offset: | 0x21 |
| Reset: | 0x00 |
| Property: | When addressing as I/O Register:
address offset is 0x01 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | DDRA7 | DDRA6 | DDRA5 | DDRA4 | DDRA3 | DDRA2 | DDRA1 | DDRA0 | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 0, 1, 2, 3, 4, 5, 6, 7 – DDRA Port A Data
Direction
This bit field
selects the data direction for the individual pins in the Port. When a Port is
mapped as virtual, accessing this bit field is identical to accessing the actual DIR
register for the Port.
