When addressing I/O Registers as data space using LD
and ST instructions, the provided offset must be used. When using the I/O specific
commands IN and OUT, the offset is reduced by 0x20, resulting in an I/O address offset
within 0x00 - 0x3F.
Name:
PINA
Offset:
0x20
Reset:
N/A
Property:
When addressing as I/O Register:
address offset is 0x00
Bit
7
6
5
4
3
2
1
0
PINA7
PINA6
PINA5
PINA4
PINA3
PINA2
PINA1
PINA0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
Bits 0, 1, 2, 3, 4, 5, 6, 7 – PINA Port A Input Pins
Address
Writing to the pin
register provides toggle functionality for IO. Refer to Toggling the Pin.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
