29.6.2.1 Initialization

The SERCOM bus clock (CLK_SERCOMx_APB) is required to access the SERCOM registers. This clock must be enabled in the MCLK - Main Clock Controller.

Two generic clocks are used by the SERCOM: GCLK_SERCOMx_CORE is required to clock the SERCOM while working as a Host, and GCLK_SERCOM_SLOW is required only for certain functions. See specific mode chapters for details. These clocks must be configured and enabled in the GCLK - Generic Clock Controller before using the SERCOM.

The SERCOM must be configured to the desired mode by writing the Operating Mode bits in the Control A register (CTRLA.MODE). Refer to the following table for details.

Table 29-1. SERCOM Modes
CTRLA.MODE Description
0x0 USART with external clock
0x1 USART with internal clock
0x2 SPI in Client operation
0x3 SPI in Host operation
0x4 I2C Client operation
0x5 I2C Host operation
0x6-0x7 Reserved

For further initialization information, see the respective SERCOM mode chapters: