13.4 Signal Description

The DSU uses the following three signals to function.

Signal Name Type Description
RESET Digital Input External reset pin
SWCLK Digital Input SW clock pin
SWDIO Digital I/O SW bidirectional data pin
Note: The SWCLK pin is by default assigned to the DSU module to allow debugger probe detection and to stretch the CPU reset phase. For more information, refer to 20.6.3 Debugger Probe Detection. The Hot-Plugging feature depends on the PORT configuration. If the SWCLK pin function is changed in the PORT, the Hot-Plugging feature is disabled until a power-reset or an external reset is performed.