23.6 Register Summary - Mode 0 - 32-Bit Counter
This Register Description section is valid if the RTC is in COUNT32 mode (CTRLA.MODE=0).
Refer to the Registers Description section for more details on register properties and access permissions.
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x00 | CTRLA | 15:8 | COUNTSYNC | PRESCALER[3:0] | ||||||
| 7:0 | MATCHCLR | MODE[1:0] | ENABLE | SWRST | ||||||
| 0x02 | CTRLB | 15:8 | ||||||||
| 7:0 | GP0EN | |||||||||
| 0x04 | EVCTRL | 31:24 | PERDEO | |||||||
| 23:16 | ||||||||||
| 15:8 | OVFEO | CMPEO0 | ||||||||
| 7:0 | PEREO7 | PEREO6 | PEREO5 | PEREO4 | PEREO3 | PEREO2 | PEREO1 | PEREO0 | ||
| 0x08 | INTENCLR | 15:8 | OVF | CMP0 | ||||||
| 7:0 | PER7 | PER6 | PER5 | PER4 | PER3 | PER2 | PER1 | PER0 | ||
| 0x0A | INTENSET | 15:8 | OVF | CMP0 | ||||||
| 7:0 | PER7 | PER6 | PER5 | PER4 | PER3 | PER2 | PER1 | PER0 | ||
| 0x0C | INTFLAG | 15:8 | OVF | CMP0 | ||||||
| 7:0 | PER7 | PER6 | PER5 | PER4 | PER3 | PER2 | PER1 | PER0 | ||
| 0x0E | DBGCTRL | 7:0 | DBGRUN | |||||||
0x0F | Reserved | |||||||||
| 0x10 | SYNCBUSY | 31:24 | ||||||||
| 23:16 | GP1 | GP0 | ||||||||
| 15:8 | COUNTSYNC | |||||||||
| 7:0 | COMP0 | COUNT | FREQCORR | ENABLE | SWRST | |||||
| 0x14 | FREQCORR | 7:0 | SIGN | VALUE[6:0] | ||||||
0x15 ... 0x17 | Reserved | |||||||||
| 0x18 | COUNT | 31:24 | COUNT[31:24] | |||||||
| 23:16 | COUNT[23:16] | |||||||||
| 15:8 | COUNT[15:8] | |||||||||
| 7:0 | COUNT[7:0] | |||||||||
0x1C ... 0x1F | Reserved | |||||||||
| 0x20 | COMP0 | 31:24 | COMP[31:24] | |||||||
| 23:16 | COMP[23:16] | |||||||||
| 15:8 | COMP[15:8] | |||||||||
| 7:0 | COMP[7:0] | |||||||||
0x24 ... 0x3F | Reserved | |||||||||
| 0x40 | GP0 | 31:24 | GP[31:24] | |||||||
| 23:16 | GP[23:16] | |||||||||
| 15:8 | GP[15:8] | |||||||||
| 7:0 | GP[7:0] | |||||||||
| 0x44 | GP1 | 31:24 | GP[31:24] | |||||||
| 23:16 | GP[23:16] | |||||||||
| 15:8 | GP[15:8] | |||||||||
| 7:0 | GP[7:0] | |||||||||