14.3 Block Diagram
The generation of the Peripheral Clock signals (GCLK_PERIPH) and the Main Clock (GCLK_MAIN) are shown in the following figure:
The GCLK block diagram is shown in the following figure:
The generation of the Peripheral Clock signals (GCLK_PERIPH) and the Main Clock (GCLK_MAIN) are shown in the following figure:
The GCLK block diagram is shown in the following figure:
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