3.5.5 CLC4

Configure CLC4 as shown in Figure 3-6. Select 2-input D flip-flop with R in the Mode field. Select the TMR6_OUT overflow signal as the clock to the D Flip-Flop register and select CLCIN2 as the input signal. Connect these two signals to the CLC logic gates 1 and 2 respectively as highlighted in the red circles in Figure 3-6.