31.1.17.2 Reset and Low Voltage (BOR) Error (INTFLAG.RSTERR)

If a reset or BOR event occurs while an NVMOP command is underway, the FCW sets flags as per the Interrupt Flag Summary table and aborts row programming (on a quad write boundary) and all erases. A system reset prevents an interrupt from occurring. However, relevant INTFLAG bits are reset on POR and maintain state through a system reset and a BOR. Therefore, software can check the prior state of the FCW. It can also check the device’s RCAUSE register to see if the error is from a system reset or from a BOR. If the system shows a POR occurred, software has no guaranteed way of knowing if the system had been operational and a write/erase operation was underway at the time the POR occurred.