5 Enhanced Joint Test Action Group (EJTAG) vs In-Circuit Serial Programming™ (ICSP)

Programming is accomplished through the EJTAG module in the CPU core. EJTAG is connected to either the full set of JTAG pins or a reduced Two-Wire to Four-Wire EJTAG interface for ICSP mode. In both modes, programming of the PIC32 Flash memory is accomplished through the ETAP controller. The TAP controller uses the TMS pin to determine if Instruction or Data registers must be accessed in the shift path between TDI and TDO, see Figure 5-1.

The basic concept of the EJTAG that is used for programming is the use of a special memory area called DMSEG (0xFF200000 to 0xFF2FFFFF), which is only available when the processor is running in the Debug mode. All instructions are serially shifted into an internal buffer, and then loaded into the Instruction register and executed by the CPU. Instructions are fed through the ETAP state machine in 32-bit groups.