5.1 Programming Interface

Enhanced Tag Access Port (ETAP)

This block serially feeds instructions and data into the CPU.

Microchip Tag Access Port (MTAP)

In addition to the EJTAG TAP (ETAP) controller, the PIC32 device uses a second proprietary TAP controller for additional operations. The Microchip TAP (MTAP) controller supports two instructions relevant to programming, MTAP_COMMAND and TAP switch instructions. See Table 20-1 for complete list of instructions. The MTAP_COMMAND instruction provides a mechanism for a JTAG probe to send commands to the device through its Data register.

The programmer sends commands by shifting in the MTAP_COMMAND instruction through the SendCommand pseudo operation, and then sending the MTAP_COMMAND DR commands through the XferData pseudo operation, see Table 20-2 for specific commands. The probe does not need to issue an MTAP_COMMAND instruction for every command shifted into the Data register.

Two-Wire or Four-Wire

This block converts the Two-Wire ICSP™ interface to the Four-Wire JTAG interface.

CPU

The CPU executes instructions at 8 MHz through the internal oscillator.

Flash Controller

The Flash controller controls erasing and programming of the Flash memory on the device.

Flash Memory

The PIC32 device Flash memory is divided into two logical Flash partitions consisting of the Boot Flash Memory (BFM) and Program Flash Memory (PFM). The BFM begins at address 0x1FC00000, and the PFM begins at address 0x1D000000. Each Flash partition is divided into pages, which represent the smallest block of memory that can be erased. Depending on the device, page sizes are 256 words (1024 bytes), 1024 words (4096 bytes) or 4096 words (16,384 bytes). Row size indicates the number of words that are programmed with the row program command. There are always eight rows within a page; therefore, devices with 256, 1024 and 4096 word page sizes have 32, 128 and 512 word row sizes, respectively. Table 5-1 shows the PFM, BFM, row and page size of each device family.

For a PIC32MZ W1 device, the BFM begins at address 0x1FC00000, and the PFM begins at address 0x10000000. The Flash is divided into pages of 1024 words or 4-KB, which represents the smallest block of memory that can be erased. Row size indicates the number of words that are programmed with row program commands. The Flash contains four rows within a page with a total row size of 256 words or 1024 bytes.

Memory locations of the BFM are reserved for the device Configuration registers, see Configuration Memory and Device ID for more information.