15.2 Verifying Memory without the PE

Reading from the Flash memory is performed by executing a series of read accesses from the Fastdata register. Table 20-3 shows the EJTAG programming details, including the address and op code data for performing processor access operations.
Figure 15-2. Verifying Memory without the PE
The following steps are required to verify memory:
  1. XferInstruction (op code).
  2. Repeat step 1 until the CPU receives the last instruction.
  3. Verify that valRead matches the copy held in the programmer’s buffer.
  4. Repeat steps 1-3 for each memory location.
Table 15-1. Verify Device OP Codes
Step NumberOp CodeInstruction
Step 1Initialize some constants.
3c13ff20lui s3, 0xFF20
Step 2Read memory location.
3c08<ADDR>lui t0,<FLASH_WORD_ADDR(31:16)>
3508<ADDR>ori t0, t0, <FLASH_WORD_ADDR(15:0)>
Step 3Write to Fastdata location.
8d090000lw t1, 0(t0)
ae690000sw t1, 0(s3)
Step 4Read data from Fastdata register 0xFF200000.
Step 3Repeat steps 2-4 until all configuration locations are read.