4.2.4 Digital Input Disable Register 0
| Name: | DIDR0 |
| Offset: | 0x17 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ADC3D | ADC2D | ADC1D | ADC0D | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
Bit 3 – ADC3D ADC3 Digital Input Disable
Bit 2 – ADC2D ADC2 Digital Input Disable
Bit 1 – ADC1D ADC1 Digital Input Disable
Bit 0 – ADC0D ADC0 Digital Input Disable
When this bit is set, the digital input buffer on pin AIN1 (ADC1) / AIN0 (ADC0) is disabled and the corresponding PIN register bit will read as zero. When used as an analog input but not required as a digital input the power consumption in the digital input buffer can be reduced by writing this bit to logic one.
