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34.8.18 Non-Secure Channels Check
Register
Table 34-21. Register Bit Attribute Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: NSCHKCHAN Offset: 0x1DC Reset: 0x00000000 Property: RW
Bit 31 30 29 28 27 26 25 24 CHANNEL31 CHANNEL30 CHANNEL29 CHANNEL28 CHANNEL27 CHANNEL26 CHANNEL25 CHANNEL24 Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 CHANNEL23 CHANNEL22 CHANNEL21 CHANNEL20 CHANNEL19 CHANNEL18 CHANNEL17 CHANNEL16 Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 CHANNEL15 CHANNEL14 CHANNEL13 CHANNEL12 CHANNEL11 CHANNEL10 CHANNEL9 CHANNEL8 Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 CHANNEL7 CHANNEL6 CHANNEL5 CHANNEL4 CHANNEL3 CHANNEL2 CHANNEL1 CHANNEL0 Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – CHANNELx Channel x to be checked as non-secured
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Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – CHANNELx Channel x to be checked as non-secured
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