3.3.5 16 x 18 Coefficient ROM and B2 Register

Each Math block has a 16 x 18 coefficient ROM for storing filter coefficients, and a B2 register for delay chains. By changing the address of the coefficient ROM, a set of coefficients can be cycled through for folded, interpolation or decimation filters, and/or switch between two more sets of filter coefficients. Three IL clusters are associated with each Math block providing 36 LUTs and 36 flip-flops for connecting to the fabric and building complex structures. These ILs can be used to implement the following:

• 18 IL LUTs are used to implement a 16 x 18-bit coefficient ROM. This coefficient ROM feeds the data input of the IL registers associated with the A input of the Math block and provides storage for 16 fixed coefficient values. These coefficients are loaded during device programming. The coefficient ROM content is accessed through ADDR[3:0] for multiplication.
• 18 ILs LUTs are used to implement a 2:1 mux for selecting the BCIN.
• 18 interface logic flip-flops are used to implement the B2 register, as shown in Figure   1. This register is used in input delay chains for filtering applications.