3.3.1 Pre-Adder

Pre-adder performs the upstream addition/subtraction operation prior to multiplication. It is configured for the following operations on the inputs B[17:0] and D[17:0]:

• 18-bit addition/subtraction, producing the result B[17:0] ± D[17:0]. For more information, see Figure   1.
• Two 9-bit additions/subtractions, producing the results B[8:0] ± D[8:0], B[17:9] ± D[17:9]. For more information, see Figure   1. In the two 9-bit adder/subtractor modes, the type of operation (addition/subtraction) performed on the lower pre-adder of bits B[8:0] and D[8:0], and the type of operation performed on the upper pre-adder of bits B[17:9], D[17:9] must be the same.
• Single 9-bit addition/subtraction, producing the result B[17:9] ± D[17:9]. For more information, see Figure   1.