41.6.2.2 Enabling, Disabling and Resetting

The TCC is enabled by writing a ‘1’ to the Enable bit in the Control A register (CTRLA.ENABLE). The TCC is disabled by writing a ‘0’ to CTRLA.ENABLE.

The TCC is reset by writing ‘1’ to the Software Reset bit in the Control A register (CTRLA.SWRST). All registers in the TCC, except DBGCTRL, are reset to their initial state and the TCC is disabled. See the CTRLA register from Related Links.

The TCC must be disabled before the TCC is reset to avoid undefined behavior.