30.8.8 Channel n Control
This register allows the user to configure channel n. To write to this register, do a single, 32-bit write of all the configuration data.
| Name: | CHANNEL |
| Offset: | 0x20 + n*0x08 [n=0..31] |
| Reset: | 0x00008000 |
| Property: | PAC Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ONDEMAND | RUNSTDBY | EDGSEL[1:0] | PATH[1:0] | ||||||
| Access | RW | RW | RW | RW | RW | RW | |||
| Reset | 1 | 0 | 0 | 0 | 0 | 0 | |||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| EVGEN[6:0] | |||||||||
| Access | RW | RW | RW | RW | RW | RW | RW | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
Bit 15 – ONDEMAND Generic Clock On Demand
This bit is used to determine whether the generic clock is requested.
| Value | Description |
|---|---|
| 0 | Generic clock for a channel is always on, if the channel is configured and generic clock source is enabled. |
| 1 | Generic clock is requested on demand while an event is handled |
Bit 14 – RUNSTDBY Run in Standby
This bit is used to define the behavior during Standby Sleep mode.
| Value | Description |
|---|---|
| 0 | The channel is disabled in Standby Sleep mode. |
| 1 | The channel is not stopped in Standby Sleep mode and depends on the CHANNEL.ONDEMAND bit. |
Bits 11:10 – EDGSEL[1:0] Edge Detection Selection
These bits set the type of edge detection to be used on the channel.
These bits must be written to zero when using the asynchronous path.
| Value | Name | Description |
|---|---|---|
| 0x0 | NO_EVT_OUTPUT | No event output when using the resynchronized or synchronous path |
| 0x1 | RISING_EDGE | Event detection only on the rising edge of the signal from the event generator |
| 0x2 | FALLING_EDGE | Event detection only on the falling edge of the signal from the event generator |
| 0x3 | BOTH_EDGES | Event detection on rising and falling edges of the signal from the event generator |
Bits 9:8 – PATH[1:0] Path Selection
These bits are used to choose which path is used by the selected channel.
Note: The path choice can be limited by the channel source; see USERm from Related Links.
Important: Only EVSYS channel 0 to 11 can be configured as synchronous or resynchronized.
| Value | Name | Description |
|---|---|---|
| 0x0 | SYNCHRONOUS | Synchronous path |
| 0x1 | RESYNCHRONIZED | Resynchronized path |
| 0x2 | ASYNCHRONOUS | Asynchronous path |
| Other | — | Reserved |
Bits 6:0 – EVGEN[6:0] Event Generator Selection
These bits are used to choose the event generator to connect to the selected channel.
| Value | Name | Description |
|---|---|---|
| 0x00 | None | No event generator selected |
| 0x01 - 0x08 | RTC_PERx | RTC period x=0..7 |
| 0x09 - 0x0C | RTC_CMPx | RTC comparison x=0..3 |
| 0x0D | RTC_TAMPER | RTC tamper detection |
| 0x0E | RTC_OVF | RTC overflow |
| 0x0F - 0x12 | EIC_EXTINTx | EIC external interrupt x=0..3 |
| 0x13 - 0x16 | DMAC_CHx | DMA channel x=0..3 |
| 0x17 | PAC_ACCERR | PAC Acc. error |
| 0x18 | TCC0_OVF | TCC0 overflow |
| 0x19 | TCC0_TRG | TCC0 trigger event |
| 0x1A | TCC0_CNT | TCC0 counter |
| 0x1B-0x20 | TCC0_MCx | TCC0 match/compare x=0..5 |
| 0x21 | TCC1_OVF | TCC1 overflow |
| 0x22 | TCC1_TRG | TCC1 trigger event |
| 0x23 | TCC1_CNT | TCC1 counter |
| 0x24 - 0x29 | TCC1_MCx | TCC1 match/compare x=0..5 |
| 0x2A | TCC2_OVF | TCC2 overflow |
| 0x2B | TCC2_TRG | TCC2 trigger event |
| 0x2C | TCC2_CNT | TCC2 counter |
| 0x2D - 0x2E | TCC2_MCx | TCC2 match/compare x=0..1 |
| 0x2F | TC0_OVF | TC0 overflow |
| 0x30-0x31 | TC0_MCx | TC0 match/compare x=0..1 |
| 0x32 | TC1_OVF | TC1 overflow |
| 0x33 - 0x34 | TC1_MCx | TC1 match/compare x=0..1 |
| 0x35 | TC2_OVF | TC2 overflow |
| 0x36 - 0x37 | TC2_MCx | TC2 match/compare x=0..1 |
| 0x38 | TC3_OVF | TC3 overflow |
| 0x39 - 0x3A | TC3_MCx | TC3 match/compare x=0..1 |
| 0x3B | TC4_OVF | TC4 overflow |
| 0x3C - 0x3D | TC4_MCx | TC4 match/compare x=0..1 |
| 0x3E | TC5_OVF | TC5 overflow |
| 0x3F - 0x40 | TC5_MCx | TC5 match/compare x=0..1 |
| 0x41 | TC6_OVF | TC6 overflow |
| 0x42 - 0x43 | TC6_MCx | TC6 match/compare x=0..1 |
| 0x44 | TC7_OVF | TC7 overflow |
| 0x45 - 0x46 | TC7_MCx | TC7 match/compare x=0..1 |
| 0x47 | ADC_RESRDY | ADC end-of-scan ready interrupt |
| 0x48 - 0x49 | Not used | — |
| 0x4A - 0x4B | AC_COMPx | AC comparator, x=0..1 |
| 0x4C | AC_WIN_0 | AC0 window |
| 0x4D | Not used | — |
| 0x4E - 0x4F | CCL_LUTOUTx | CCL LUTOUT x-0..1 |
| 0x50 | ZB_TX_TS_ACTIVE | ZB transmit packet active time |
| 0x51 | ZB_RX_TS_ACTIVE | ZB receive packet active time |