24.7.3 Interrupt Enable Clear
Name: | INTENCLR |
Offset: | 0x08 |
Reset: | 0x00 |
Property: | PAC Write-Protection |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
ERR | |||||||||
Access | RW | ||||||||
Reset | 0 |
Bit 0 – ERR Peripheral Access Error Interrupt Disable
- Writing a ‘
0
’ to this bit has no effect. - Writing a ‘
1
’ to this bit clears the Peripheral Access Error Interrupt Enable bit and disables the corresponding interrupt request.
Value | Description |
---|---|
0 | Peripheral Access Error interrupt is disabled. |
1 | Peripheral Access Error interrupt is enabled. |