24.7.9 Peripheral Write Protection Status A
Writing to this register has no effect.
Reading the STATUS register returns the peripheral write protection status:
| Value | Description |
|---|---|
| 0 | Peripheral is not write protected |
| 1 | Peripheral is write protected |
| Name: | STATUSA |
| Offset: | 0x34 |
| Reset: | 0x00000000 |
| Property: | PAC Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| TCC2 | TCC1 | TCC0 | TC7 | TC6 | TC5 | TC4 | TC3 | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TC2 | TC1 | TC0 | SERCOM1 | SERCOM0 | EIC | FREQM | PAC | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 15 – TCC2 TCC2 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TCC2 peripheral is not write protected |
| 1 | TCC2 peripheral is write protected |
Bit 14 – TCC1 TCC1 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TCC1 peripheral is not write protected |
| 1 | TCC1 peripheral is write protected |
Bit 13 – TCC0 TCC0 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TCC0 peripheral is not write protected |
| 1 | TCC0 peripheral is write protected |
Bit 12 – TC7 TC7 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TC7 peripheral is not write protected |
| 1 | TC7 peripheral is write protected |
Bit 11 – TC6 TC6 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TC6 peripheral is not write protected |
| 1 | TC6 peripheral is write protected |
Bit 10 – TC5 TC5 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TC5 peripheral is not write protected |
| 1 | TC5 peripheral is write protected |
Bit 9 – TC4 TC4 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TC4 peripheral is not write protected |
| 1 | TC4 peripheral is write protected |
Bit 8 – TC3 TC3 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TC3 peripheral is not write protected |
| 1 | TC3 peripheral is write protected |
Bit 7 – TC2 TC2 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TC2 peripheral is not write protected |
| 1 | TC2 peripheral is write protected |
Bit 6 – TC1 TC1 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TC1 peripheral is not write protected |
| 1 | TC1 peripheral is write protected |
Bit 5 – TC0 TC0 APB Protect Enable
| Value | Description |
|---|---|
| 0 | TC0 peripheral is not write protected |
| 1 | TC0 peripheral is write protected |
Bit 4 – SERCOM1 SERCOM1 APB Protect Enable
| Value | Description |
|---|---|
| 0 | SERCOM1 peripheral is not write protected |
| 1 | SERCOM1 peripheral is write protected |
Bit 3 – SERCOM0 SERCOM0 APB Protect Enable
| Value | Description |
|---|---|
| 0 | SERCOM0 peripheral is not write protected |
| 1 | SERCOM0 peripheral is write protected |
Bit 2 – EIC EIC APB Protect Enable
| Value | Description |
|---|---|
| 0 | EIC peripheral is not write protected |
| 1 | EIC peripheral is write protected |
Bit 1 – FREQM FREQM APB Protect Enable
| Value | Description |
|---|---|
| 0 | FREQM peripheral is not write protected |
| 1 | FREQM peripheral is write protected |
Bit 0 – PAC PAC APB Protect Enable
| Value | Description |
|---|---|
| 0 | PAC peripheral is not write protected |
| 1 | PAC peripheral is write protected |