24.7.8 Peripheral Interrupt Flag Status - Bridge C
These flags are set when a Peripheral Access Error occurs while accessing the peripheral associated with the respective INTFLAGx bit, and an interrupt request is generated if INTENCLR/SET.ERR is ‘1’.
Writing a ‘0’ to these bits has no effect.
Writing a ‘1’ to these bits clears the corresponding INTFLAGx interrupt flag.
| Name: | INTFLAGC |
| Offset: | 0x1C |
| Reset: | 0x00000000 |
| Property: | – |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| HMTX | |||||||||
| Access | RW | ||||||||
| Reset | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| AC | CCL | SERCOM2 | QSPI | ||||||
| Access | RW | RW | RW | RW | |||||
| Reset | 0 | 0 | 0 | 0 |
Bit 9 – HMTX HMATRIX APB Protection Enable
This flag is set when a Peripheral Access Error occurs while accessing the HMATRIX, and an interrupt request is generated if INTENCLR/SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the HMATRIX interrupt flag.
Bit 7 – AC Interrupt Flag for AC
This flag is set when a Peripheral Access Error occurs while the AC, and an interrupt request is generated if INTENCLR/SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the AC interrupt flag.
Bit 6 – CCL Interrupt Flag for CCL
This flag is set when a Peripheral Access Error occurs while accessing the CCL, and an interrupt request is generated if INTENCLR/SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the CCL interrupt flag.
Bit 1 – SERCOM2 Interrupt Flag for SERCOM2
This flag is set when a Peripheral Access Error occurs while accessing the SERCOM2, and an interrupt request is generated if INTENCLR/SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the SERCOM2 interrupt flag.
Bit 0 – QSPI Interrupt Flag for QSPI
This flag is set when a Peripheral Access Error occurs while accessing the QSPI, and an interrupt request is generated if INTENCLR/SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the QSPI interrupt flag.