2.1 Block Diagram

Figure 2-1 shows the PL360 system architecture of the embedded firmware. The PL360 device has an embedded Cortex® M7 CPU running the PLC firmware. This firmware can either implement the G3 or the PRIME Physical layer, depending on what has been loaded by the PL360 Host Controller. The components of the system are described in the following subsections.

Figure 2-1. PL360 Embedded Firmware Architecture