26.7.1 Interrupt Enable Clear

Table 26-3. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: INTENCLR
Offset: 0x0000
Reset: 0x00000000
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
      ADDVREGRDY2ADDVREGRDY1ADDVREGRDY0 
Access R/WR/WR/W 
Reset 000 
Bit 76543210 
  BORVDDUSB1BORVDDUSB0   LVDRDYLVDET 
Access R/WR/WR/WR/W 
Reset 0000 

Bits 8, 9, 10 – ADDVREGRDYn Additional Regulator n Ready Interrupt Enable Clear , n = 0 for USB-PHY0, n = 1 for USB-PHY1, and n = 2 for PLL

Writing a zero to these bits has no effect.

Writing a one to a bit disables the corresponding ADDVREGRDYn interrupt.

Each bit will read as the current value of the ADDVREGRDYn interrupt enable.

Bits 5, 6 – BORVDDUSBn BORVDDUSBn Interrupt Enable Clear, n = 0,1

Writing a zero to these bits has no effect.

Writing a one to a bit disables the corresponding BORVDDUSBn interrupt.

Each bit will read as the current value of the BORVDDUSBn interrupt enable.

Bit 1 – LVDRDY Low Voltage Detector Ready Interrupt Enable Clear

Writing a zero to this bit has no effect.

Writing a one to this bit disables the LVDRDY interrupt.

This bit will read as the current value of the LVDRDY interrupt enable.

Bit 0 – LVDET Low Voltage Detector Interrupt Enable Clear

Writing a zero to this bit has no effect.

Writing a one to this bit disables the LVDET interrupt.

This bit will read as the current value of the LVDET interrupt enable.