26.7.7 LVD Control

Note: The LVD comparator is testing for a threshold on the VDDIO supply.
Table 26-9. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: LVD
Offset: 0x0018
Reset: 0x00000000
Property: PAC Write Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
     LEVEL[3:0] 
Access R/WR/WR/WR/W 
Reset 0000 
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
    RUNSTDBYOEVENDIRENABLE  
Access R/WR/WR/WR/W 
Reset 0000 

Bits 19:16 – LEVEL[3:0] Threshold Level

ValueDescription
11113.630 V
11103.330 V
11013.000 V
11002.927 V
10112.824 V
10102.727 V
10012.500 V
10002.400 V
01112.308 V
01102.243 V
01012.202 V
01002.124 V
00112.017 V
00101.890 V
00011.805 V
00001.727 V

Bit 4 – RUNSTDBY Run During Standby

ValueDescription
0Run during standby disabled
1Run during standby enabled

Bit 3 – OEVEN Output Event Enable

ValueDescription
0Output events disabled
1Output events enabled

Bit 2 – DIR Detection Direction

ValueDescription
0Rising detection
1Falling detection

Bit 1 – ENABLE Enable Low Voltage Detection

ValueDescription
0Low Voltage Detection disabled
1Low Voltage Detection enabled