29.8 CLB Configuration

The CLB module must be completely configured before use. The Configuration Interface allows for complete configuration of all CLB parameters. The Configuration Interface will create a netlist which is stored in Program Memory. The NVM Scanner transfers the netlist from Program Memory into the CLB latches and Look-Up Tables (LUTs).

Important: The module must be configured via the Configuration Interface using an appropriate programming environment, then loaded into memory with the NVM Scanner, before setting the Enable bit.
Configuration of the CLB consists of the following steps:
  1. Configure the CLB using the Configuration Interface:
    • Select the inputs into the CLB using the CLB Input Selection latches
    • Configure the Edge Detectors using the CLB Input Synchronizer latches
    • Select the inputs into the BLEs using the BLE Input Selection latches
    • Configure the BLE LUTs with entries corresponding to each expected input combination using the CLB Look-Up Table latches
    • Configure the BLE output flops using the BLE Flop Select latches
    • Configure the CLB interrupts using the CLB Interrupt Selection latches
    • Determine which BLE output is routed to the eight PPS outputs using the CLB Output Selection latches
    • Select the BLE outputs that control the Counter Stop and Counter Reset values using the Counter Stop and Counter Reset Control latches, respectively.
    • Detemine which counter bit is connected to the respective BLE Input using the Counter Output Selection latches
    • Configure the CLB clock divider using the CLB Clock Divider latches
    • Transfer the netlist to Program Memory using the Configuration Interface
  2. Select the CLB clock source using the CLBCLK register.
  3. Configure the CLB PPS output enable settings using the CLBPPSCONn registers.
  4. Configure the NVM Scanner to interact with the CLB module (see the CRC section for more details).
  5. Enable the scanner to load the CLB netlist values into the CLB latches.
  6. Once the scanner has loaded the CLB configuration into NVM, enable the CLB module by setting the EN bit.

The outputs of the CLB can be viewed through external pins via PPS. The CLB outputs are also internally connected to other peripherals.