27.7.20 Debug Control

Table 27-26. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
R Readable bit HC Cleared by Hardware(Grey cell)Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: DBGCTRL
Offset: 0x2A
Reset: 0x00
Property: Write-Protected

Bit 76543210 
        DBGRUN 
Access R/W 
Reset 0 

Bit 0 – DBGRUN Debug Run

This bit can be changed only while the ADC is disabled.

This bit should be written only while a conversion is not ongoing.

ValueDescription
0

The ADC is halted during Debug mode.

1

The ADC continues normal operation during Debug mode.