2.5.5 Dynamic Voltage Scaling Rate Programming Bits (t_ramp)

The DVSR[1:0] bits define the Dynamic Voltage Scaling Rate in terms of time duration of each voltage step (t_ramp).

Due to the output capacitor voltage change rate, additional current is required at the output during DVS. The average current for 22 μF (recommended output capacitor value) is also given in the Table 2-9 below. In case the output capacitance is increased, see section PWM Mode Negative Current Limit Protection (Buck Channels).

The Buck channels of the MCP16503 also feature a negative inductor current limit protection when operating in Forced PWM mode. This prevents dangerous current levels in the power train. If the inductor current reaches the Low-Side Negative Peak Current Limit (I _{LIM_NEGx} ) while the Low-Side MOSFET is conducting, the Low-Side MOSFET is turned off and the inductor current is pushed to the input voltage, either through the body diode of the High-Side MOSFET (if OFF) or its channel (when turned ON by the control loop). Since this feature is only intended to protect the device in some particular transient conditions (such as a large decresase of the ouput voltage setting associated with an extremely large capacitive load), it is only reported through I²C, but it does not cause the assertion of the nRSTO (RESET) signal.

This protection should never be exercised continuously and/or without a very large bulk capacitor, because it may quickly destroy the device.

When this protection is engaged, energy is pumped back from the output into the input voltage. If the input supply has no sinking capability and/or the input bulk decoupling cap is not large enough, the input voltage will rise to the point where the device is permanently damaged.