2.5.3 Reset Assertion Delay (t4) Programming Bits
| RSTDLY[2:0] | Delay (ms) |
|---|---|
| 000 | 1 |
| 001 | 2 |
| 010 | 4 |
| 011 | 8 |
| 100 | 16 |
| 101 | 32 |
| 110 | 64 |
| 111 | 128 |
| RSTDLY[2:0] | Delay (ms) |
|---|---|
| 000 | 1 |
| 001 | 2 |
| 010 | 4 |
| 011 | 8 |
| 100 | 16 |
| 101 | 32 |
| 110 | 64 |
| 111 | 128 |
DS20007136A
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