3.6.6 SmartHLS Migration Guide
(Ask a Question)Learn how existing Vitis HLS / Vivado HLS designs can be easily migrated to SmartHLS.
3.6.6.1 SmartHLS Migration Guide
(Ask a Question)This section describes how existing Vitis HLS / Vivado HLS designs can be easily migrated to SmartHLS™. When migrating an existing C++ design from Vitis HLS / Vivado HLS, the pragmas and libraries used in the source code should be changed to the equivalent ones in SmartHLS. Changes to the C++ source code may also be necessary.
3.6.6.2 General Porting
(Ask a Question)Vitis HLS / Vivado HLS | SmartHLS™ |
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set_top <FUNC> (in synthesis Tcl file) | On the first line of <FUNC> , add #pragma HLS function
top
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#include <ap_int.h> |
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#include <ap_fixed.h> |
#include <hls/ap_fixpt.hpp> using hls::ap_fixpt; using hls::ap_ufixpt; #define ap_fixed ap_fixpt #define ap_ufixed ap_ufixpt |
#include <hls_stream.h> |
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hls::stream constructor |
Vitis/Vivado HLS’s stream constructor optionally takes a string name as argument, while SmartHLS’s FIFO constructor optionally takes depth and type.
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<AP_INT_VAR>.to_int() | <AP_INT_VAR>.to_uint64() , or
Vitis/Vivado
HLS's |
<AP_INT_VAR>.range(7,0).to_int() |
In SmartHLS, the return value of |
stringstream >> ap_fixpt<W, IW, Q_M, O_M> |
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#include <assert.h> |
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3.6.6.3 Pragmas
(Ask a Question)Vitis HLS / Vivado HLS | SmartHLS™ |
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aggregate, data_pack | See the Struct Variable/Argument Packing pragmas. |
allocation | A global constraint of operation resources can be set via set_resource_constraint; constraining the operation resource within a function, a loop or a block of code is not yet available. Functions that are not inlined (automatically by SmartHLS tool or specified via the Inline Function pragma) always have a single RTL module instance in hardware, and it is shared by all callers. Replication of a function instance in hardware can be achieved by the Replicate Function and Inline Function pragmas. In the case of multi-threading, each thread of a function creates an instance of the corresponding RTL module. |
array_partition |
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dataflow | Data Flow Parallelism and Multi-threading can be used to implement a task-level (dataflow) pipeline. |
dependence | See the Loop
Dependency pragma. If inside a loop, the pragma should be moved outside the loop. |
disaggregate | See the struct_fields option of the Partition Top-Level Interface pragma. |
expression_balance | See LATENCY_REDUCTION Tcl settings to control the expression balance optimization. |
function_instantiate | The equivalent optimization can be achieved with the Inline Function pragma or C++ template functions. |
inline | See the Inline Function pragma.
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inline off | See the Noinline Function pragma.
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interface | See Top-Level RTL Interface for details about supported interfaces and corresponding pragmas. |
loop_tripcount | See the Bound Loop pragma.
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pipeline, pipeline II=<II> | See Pipeline Function and Pipeline Loop pragmas. If inside a loop, the pragma should be lifted outside the loop. If inside a function, add the pragma to the beginning of the function definition block.
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pipeline off | Remove since pipelining is not applied by default. |
stable | See the stable option of the Scalar Argument Interface pragma. |
stream | Streaming interface is implemented via the hls::FIFO Argument. |
top | See the Set Top-Level Function pragma. |
unroll | See the Unroll Loop pragma, and lift it outside the loop. |
The SmartHLS tool currently does not support the following Vitis/Vivado HLS pragmas:
- array_map
- array_reshape
- bind_op
- bind_storage
- disaggregate
- latency
- loop_flatten
- loop_merge
- occurrence
- protocol
- reset
- shared
3.6.6.4 Libraries
(Ask a Question)- Arbitrary Precision Data Types
- Similar to Vitis/Vivado HLS, SmartHLS™ provides C++ Arbitrary Precision
Integer Library and C++ Arbitrary Precision
Fixed Point Library. Like Vitis/Vivado HLS, conversion between
primitive array data type pointers and the equivalent
ap_int/ap_uint
array pointers through simple pointer casting is supported in SmartHLS.For example, the following SmartHLS code is valid and safe in both hardware synthesis and software simulation.
#include <stdint.h> #include <hls/ap_int.hpp> using hls::ap_uint; uint8_t d_u8[8]; ap_uint<8> *p_u8 = (ap_uint<8> *)d_u8; uint16_t d_u16[8]; ap_uint<16> *p_u16 = (ap_uint<16> *)d_u16; uint32_t d_u32[8]; ap_uint<32> *p_u32 = (ap_uint<32> *)d_u32; uint64_t d_u64[8]; ap_uint<64> *p_u64 = (ap_uint<64> *)d_u64;
- Streaming Library
- Similar to the
hls::stream
template class in Vitis/Vivado HLS, SmartHLS provides ahls::FIFO
template class in the Streaming Library. - Math Library
- While SmartHLS supports a subset of functions in the Math Library (math.h), SmartHLS also has a Fixed Point Math Library that is optimized for hardware implementation with customizable arbitrary precisions. This library is in active development.
- Vision Library
- Like Vitis/Vivado HLS, SmartHLS has a vision library designed to simplify the development of video processing solutions on Microchip FPGA devices. The library provides pre-optimized HLS C++ library functions for fast algorithm prototyping of video applications. Using this library, OpenCV-based designs can be ported onto FPGAs with a faster time to market.
- Other Libraries
- Other libraries such as FFT, FIR, DDS, and SRL libraries are not yet supported by SmartHLS. We are actively developing libraries, such as the computer vision IPs. If you are interested in having support of certain IPs, please email us at SmartHLS@microchip.com. Your feedback is valuable to us and will help to prioritize our production plan.