Global |
- Added content related to
the SAM9X60 Series high density package devices (SAM9X60(T)-V/6GW)
- Added content related to Software License Level (SLx)
- Data sheet format reworked
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Package and Pinout | Updated Figure 1-2, Table 1-4 |
Peripheral Identifiers | Updated Table 1-7 |
External Bus Interface (EBI) | Added Device (FPGA, Static Memory, etc.) on NCS0,
DDR on NCS1 and NAND Flash on NCS2 |
Debug Unit (DBGU) |
Chip Identifier:
updated reset value information
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OTP Memory Controller (OTPC) |
OTPC_MR: corrected KBDST field width
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DDR-SDRAM Controller (MPDDRC) |
Updated Security and Safety Analysis and Reports
MPDDRC_WPSR: updated SEQE description
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Shutdown Controller (SHDWC) |
SHDW_MR: removed AUTOLPM
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Debug Unit (DBGU) |
DBGU_CIDR Simplified: updated reset value
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Power Management Controller (PMC) |
PMC_PLL_UPDT:
updated PLL ID definition
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Inter-IC Sound Multi-Channel Controller (I2SMCC) |
Updated Figure 6-29
TDM
Reception and Transmission Sequence: added note
I2SMCC_MRA: updated TDMFS description
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Synchronous Serial Controller (SSC) |
Updated Embedded Characteristics (added “Up to 16 Channels in TDM Mode”)
Added Audio Sampling Rate Limitations
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Flexible Serial Communication Controller (FLEXCOM) |
Updated Baud Rate Generator, Baud Rate in Synchronous Mode, FIFO
Overflow/Underflow Error, FIFO
Overflow/Underflow Error, FIFO
Overflow/Underflow Error
Updated TXFPTEF and RXFPTEF definitions in FLEX_US_FESR, FLEX_SPI_SR, FLEX_TWI_FSR
Added note in FLEX_US_FIDI (LON_MODE), FLEX_US_LONB1TX, FLEX_US_LONB1RX, FLEX_US_IDTTX, FLEX_US_IDTRX
FLEX_SPI_MR: added LSBHALF
Added detail on WPEN in FLEX_TWI_SMBTR
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USB Device High Speed Port (UDPHS) |
Updated Transfer Without DMA
Throughout, corrected number of DMA channels from 7 to 6
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Analog-to-Digital Controller (ADC) |
Updated Table 9-8
ADC_SEQR2: updated USCHx field width
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Electrical Characteristics |
Added Table 10-6, Table 10-7
Updated Figure 10-15
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