38.6.1 Timing Engine Configuration
Before writing in the Configuration registers, LCDC_LCDCFGx, of the timing engine, the bit SIPSTS in the Status register (LCDC_LCDSR) must be cleared.
Before writing in the Configuration registers, LCDC_LCDCFGx, of the timing engine, the bit SIPSTS in the Status register (LCDC_LCDSR) must be cleared.
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