3.3 I/O Pins Settings
Each I/O pin has an associated IOx settings register, which controls the following parameters for the associated I/O pin:
- Pin function designation
- Pin direction
- Default output state
- Pull-up enable or disable
- Open-drain enable or disable
- Alert edge selection or clock output frequency, where applicable
The supported settings for each I/O pin designation are shown in Table 3-2.
| I/O Designation | I/O Direction | Open-Drain | Pin Output State | Pull-up | Trigger Edge/Clock frequency |
|---|---|---|---|---|---|
| GPIO [5:0] | Input/Output | Enable/Disable (if output) | ‘0’/’1’ (if output) | Enable/Disable (if input) | — |
| ALRT [3:0] | Input | — | — | Enable/Disable | Falling, rising, both or none |
| CS [3:0] | Output | — | SPI controlled | — | — |
| CLKO | Output | — | Clock Module Controlled | — | 6 MHz, 4MHz, 2MHz or 1MHz |
| USBCFG | Output | Enable/Disable | USB controlled | — | — |
| USBSPND | Output | Enable/Disable | USB controlled | — | — |
| RTS | Output | Enable/Disable | UART controlled | — | — |
| CTS | Input | — | — | Disable | — |
| RXA | Output | Enable/Disable | UART controlled | — | — |
| TXA | Output | Enable/Disable | UART controlled | — | — |
| SPIA | Output | Enable/Disable | SPI controlled | — | — |
| I2CA | Output | Enable/Disable | I2C controlled | — | — |
| I2CTO | Output | Enable/Disable | I2C controlled | — | — |
| Byte Index | Register name | Comments |
|---|---|---|
| 0 | IO0SETTING | IO0 pin designation, direction, pull-up enable, open-drain, alert edge, and idle-state selection |
| 1 | IO1SETTING | IO1 pin designation, direction, pull-up enable, open-drain, “—”, and idle-state selection |
| 2 | IO2SETTING | IO2 pin designation, direction, pull-up enable, open-drain, alert edge, and idle-state selection |
| 3 | IO3SETTING | IO3 pin designation, direction, pull-up enable, open-drain, CLKO frequency, and idle-state selection |
| 4 | IO4SETTING | IO4 pin designation, direction, pull-up enable, open-drain, alert edge, and idle-state selection |
| 5 | IO5SETTING | IO5 pin designation, direction, pull-up enable, open-drain, alert edge, and idle-state selection |
The I/O pin power-up settings are made active settings during a device power-up or reset.
Changes made to these settings take effect after:
- A power cycle
- A device Reset
- Sending the vendor command, CNFG_SetNVMAsCurrent
The changes made to the active settings take effect immediately but are lost after a power cycle or a device reset.
