Libero® SoC v2022.2

10.2 Tutorial 2 - False Path Constraints

This section describes how to enter false path constraints in SmartTime. You will import an RTL source file from the following design. After routing the design, you will analyze the timing, set false path constraints, and observe the maximum operating frequency in the SmartTime Timing Analysis window.

Figure 10-23. Example Design with False Paths

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