18.4.1 Control Registers

Most types of device resets set corresponding status bits in the RCON register to indicate the type of Reset. The one exception is for the Non-Maskable Interrupt (NMI) time-out Reset. A POR clears all RCON bits, except the BOR and POR bits (RCON[1:0]), which are set. The user software can set or clear any of the bits at any time during code execution. The RCON bits serve only as status bits. Setting a Reset status bit in software does not allow system Reset.

The RCON register has other bits associated with the Watchdog Timer (WDT) and device power-saving states. For more information on the function of these bits, see Using the RCON Status Bits from Related Links.

The RSWRST control register has only one bit, SWRST. This bit is used to force a software Reset condition.

The system clock begins after a delay equal to the duration of the value of RNMICON.NMICNT as it is decremented to zero. During this interval, the program can clear the WDT or DMT flag bits, if desired, to avoid a Reset. If the Active flag is not cleared, the device resets at the end of the interval. The RNMICON.NMICNT value can be set to zero for no delay and up to 255 SYS_CLK cycles.

The user can also trigger the NMI interrupt by setting the RNMICON.SWNMI bit in software or if the RNMICON.CF bit is set by the FSCM. But these do not begin the countdown and do not automatically lead to a Reset.

The Resets module consists of the following Special Function Registers (SFRs):

• RCON - Reset Control Register
• RSWRST - Software Reset Register
• RNMICON - Non-maskable Interrupt (NMI) Control Register