7.2.5 PIOE Pin List

Table 7-5. PIOE Pin Description
Pad No.	Power Rail	I/O Type	Primary		Alternate Signal	PIO Peripheral				Reset State⁽¹⁾	Note
Pad No.	Power Rail	I/O Type	Signal	Type	Alternate Signal	Func	Signal		IO Set	Signal, Dir, PU, PD, HiZ, ST	Note
60	VDDGMAC1	GPIO	PE0	GPIO	--	A	G1_TX2	GPIO	1	PIO, I, PU, ST
						B	FLEXCOM5_IO2	GPIO	2
						C	I2SMCC1_DIN0	GPIO	2
						D	PDMC1_CLK	GPIO	3
62	VDDGMAC1	GPIO	PE1	GPIO	--	A	G1_TX3	GPIO	1	PIO, I, PU, ST
						B	FLEXCOM5_IO3	GPIO	2
						C	I2SMCC1_WS	GPIO	2
						D	PDMC0_DS1	GPIO	4
59	VDDGMAC1	GPIO	PE2	GPIO	--	A	G1_RXCK	GPIO	1	PIO, I, PU, ST
						B	FLEXCOM5_IO1	GPIO	2
						C	I2SMCC1_CK	GPIO	2
						D	PDMC0_CLK	GPIO	4
61	VDDGMAC1	GPIO	PE3	GPIO	--	A	G1_TSUCOMP	GPIO	1,2	PIO, I, PU, ST
						B	FLEXCOM5_IO0	GPIO	2
						C	I2SMCC1_DOUT0	GPIO	2
						D	PDMC0_DS0	GPIO	4
9	VDDLVDS	GPIO	PE4	GPIO	LVDS_D0_N	A	LCDC_DAT0	GPIO	1,2	PIO, I, PU, ST
						B	FLEXCOM2_IO2	GPIO	1
						C	PWML0	GPIO	2
						D	TIOA3	GPIO	1
						E	I2SMCC0_DIN1	GPIO	2
10	VDDLVDS	GPIO	PE5	GPIO	LVDS_D0_P	A	LCDC_DAT1	GPIO	1,2	PIO, I, PU, ST
						B	FLEXCOM2_IO3	GPIO	1
						C	PWMH0	GPIO	2
						D	TIOB3	GPIO	1
						E	I2SMCC0_DIN2	GPIO	2
12	VDDLVDS	GPIO	PE6	GPIO	LVDS_D1_N	A	LCDC_DAT2	GPIO	1,2	PIO, I, PU, ST
						B	FLEXCOM2_IO4	GPIO	1
						C	PWML1	GPIO	2
						D	TCLK3	GPIO	1
						E	I2SMCC0_DIN3	GPIO	2
13	VDDLVDS	GPIO	PE7	GPIO	LVDS_D1_P	A	LCDC_DAT3	GPIO	1,2	PIO, I, PU, ST
						B	FLEXCOM2_IO5	GPIO	1
						C	PWMH1	GPIO	2
						D	TIOA4	GPIO	1
						E	I2SMCC0_DOUT1	GPIO	2
15	VDDLVDS	GPIO	PE8	GPIO	LVDS_D2_N	A	LCDC_DAT4	GPIO	1,2	PIO, I, PU, ST
						B	FLEXCOM2_IO0	GPIO	1
						C	PWML2	GPIO	2
						D	TIOB4	GPIO	1
						E	I2SMCC0_CK	GPIO	2
16	VDDLVDS	GPIO	PE9	GPIO	LVDS_D2_P	A	LCDC_DAT5	GPIO	1,2	PIO, I, PU, ST
						B	FLEXCOM2_IO1	GPIO	1
						C	PWMH2	GPIO	2
						D	TCLK4	GPIO	1
						E	I2SMCC0_WS	GPIO	2
19	VDDLVDS	GPIO	PE10	GPIO	LVDS_D3_N	A	LCDC_DAT6	GPIO	1,2	PIO, I, PU, ST
						B	FLEXCOM2_IO6	GPIO	1
						C	PWML3	GPIO	2
						D	TIOA5	GPIO	1
						E	I2SMCC0_DOUT2	GPIO	2
20	VDDLVDS	GPIO	PE11	GPIO	LVDS_D3_P	A	LCDC_DAT7	GPIO	1,2	PIO, I, PU, ST
						C	PWMH3	GPIO	2
						D	TIOB5	GPIO	1
						E	I2SMCC0_DOUT3	GPIO	2
17	VDDLVDS	GPIO	PE12	GPIO	LVDS_CLK_N	A	LCDC_DEN	GPIO	1,2	PIO, I, PU, ST
						B	PCK3	GPIO	4
						C	PWMEXTRG0	GPIO	2
						D	TCLK5	GPIO	1
						E	I2SMCC0_DIN0	GPIO	2
18	VDDLVDS	GPIO	PE13	GPIO	LVDS_CLK_P	A	LCDC_PCK	GPIO	1,2	PIO, I, PU, ST
						B	PCK4	GPIO	3
						C	PWMEXTRG1	GPIO	2
						E	I2SMCC0_DOUT0	GPIO	2

Note:

Signal = ‘PIO’ if GPIO; Dir = Direction; PU = Pull-up; PD = Pull-down; HiZ = High impedance; ST = Schmitt Trigger