5.4.1 User I/O Naming Conventions
(Ask a Question)The naming convention used for each FPGA user I/O is Gmn/IOuxwByVz, where:
Gmn is only used for I/Os that also have CCC access—that is, global pins. Refer to the 5.3 Global I/O Naming Conventions.
u = I/O pair number in bank, starting at 00 from the northwest I/O bank and proceeding in a clockwise direction.
x = P (positive) or N (negative) or S (single-ended) or R (regular, single-ended).
w = D (Differential Pair), P (Pair), or S (Single-Ended). D (Differential Pair) if both members of the pair are bonded out to adjacent pins or are separated only by one GND or NC pin; P (Pair) if both members of the pair are bonded out but do not meet the adjacency requirement; or S (Single-Ended) if the I/O pair is not bonded out. For Differential Pairs (D), adjacency for ball grid packages means only vertical or horizontal. Diagonal adjacency does not meet the requirements for a true differential pair.
B = Bank
y = Bank number starting at 0 from northwest I/O bank and incrementing clockwise.
V = Reference voltage
z = VREF mini bank number.
The FPGA user I/O pin functions as an input, output, tristate or bidirectional buffer. Input and output signal levels are compatible with the I/O standard selected. Unused I/O pins are disabled by Libero SoC software and include a weak pull-up resistor. During power-up, the used I/O pins are tristated with no pull-up or pull-down resistors until I/O enable (there is a delay after voltage stabilizes, and different I/O banks power up sequentially to avoid a surge of ICCI).
Unused I/Os are configured as follows:
- Output buffer is disabled (with tristate value of high impedance)
- Input buffer is disabled (with tristate value of high impedance)
- Weak pull-up is programmed
Some of these pins are also multiplexed with integrated peripherals in the MSS (Ethernet MAC and external memory controller).
All unused MSS I/Os are tristated by default (with output buffer disabled). However, you can configure it as weak pull-up or pull-down by using Libero SoC I/O attributor window. The Schmitt trigger is disabled. Essentially, I/Os have the reset values as defined in Table 19-25 IOMUX_n_CR, in the SmartFusion Microcontroller Subsystem User's Guide.
During programming, I/Os become tristated and weakly pulled up to VCCI. With the VCCI and VCC supplies continuously powered up, when the device transitions from programming to operating mode, the I/Os are instantly configured to the desired user configuration. For more information, see the SmartFusion FPGA User I/Os section in the SmartFusion FPGA Fabric User’s Guide.