5.4 User Pins
(Ask a Question)| Name | Type | Polarity/Bus Size | Description |
|---|---|---|---|
| GPIO_x | In/out | 32 | Microcontroller Subsystem (MSS) General
Purpose I/O (GPIO). The MSS GPIO pin functions as an input, output, tristate,
or bidirectional buffer with configurable interrupt generation and Schmitt
trigger support. Input and output signal levels are compatible with the I/O
standard selected. Unused GPIO pins are tristated and do not include pull-up or pull-down resistors. During power-up, the used GPIO pins are tristated with no pull-up or pull-down resistors until Sys boot configures them. Some of these pins are also multiplexed with integrated peripherals in the MSS (SPI, I2C, and UART). GPIOs can be routed to dedicated I/O buffers (MSSIOBUF) or in some cases to the FPGA fabric interface through an IOMUX. This allows GPIO pins to be multiplexed as either I/Os for the FPGA fabric, the ARM® Cortex-M3 or for given integrated MSS peripherals. The MSS peripherals are not multiplexed with each other; they are multiplexed only with the GPIO block. For more information, see the General Purpose I/O Block (GPIO) section in the SmartFusion Microcontroller Subsystem User’s Guide. |
| IO | In/out | FPGA user I/O |