51.6.18 AFEC Transfer Function
The first operation of the AFE is a sampling function relative to VDAC. VDAC is generated by an internal DAC0 or DAC1. All operations after the Sample-and-Hold are differential relative to an internal common mode voltage VCM = VVREFP/2.
In Differential mode, the Sample-and-Hold common mode voltage is equal to VDAC = VVREFP/2 (set by software DAC0 and DAC1 to code 512).
In Single-ended mode, VDAC is the common mode voltage. VDAC is the output of DAC0 or DAC1 voltage. All operations after the Sample-and-Hold are differential, including those in Single-ended mode.
For the formula example, the internal DAC0 or DAC1 is set for the code 512.
The DATA code in AFEC_CDR is up to 16-bit positive integer or two’s complement (signed integer).
The code does not exceed 4095 when the field AFEC_EMR.RES=0 (12-bit mode, no averaging).
Differential Mode (12-bit mode)
A differential input voltage VIN = VINP - VINN can be applied between two selected differential pins, e.g. AFE0_AD0 and AFE0_AD1.The ideal code Ci is calculated by using the following formula and rounding the result to the nearest positive integer.
For the other resolution defined by RES, the code Ci is extended to the corresponding resolution.
The table below is a computation example for the above formula, where VVREFP = 3V.
Ci | Gain | |||
---|---|---|---|---|
Signed | Nonsigned | 1 | 2 | 4 |
-2048 | 0 | -3 | -1.5 | -0.75 |
0 | 2047 | 0 | 0 | 0 |
2047 | 4095 | 3 | 1.5 | 0.75 |
Single-ended Mode (12-bit mode)
A single input voltage VIN can be applied to selected pins, e.g. AFE0_AD0 or AFE0_AD1. The ideal code Ci is calculated using the following formula and rounding the result to the nearest positive integer.
The single-ended ideal code conversion formula is:
For the other resolution defined by RES, the code Ci is extended to the corresponding resolution.
The table below is a computation example for the above formula, where VVREFP = 3V:
Ci | Gain | |||
---|---|---|---|---|
Signed | Nonsigned | 1 | 2 | 4 |
-2048 | 0 | 0 | 0.75 | 1.125 |
0 | 2047 | 1.5 | 1.5 | 1.5 |
2047 | 4095 | 3 | 2.25 | 1.875 |
Example of LSB Computation
The LSB is relative to the analog scale VVREFP.
The term LSB expresses the quantization step in volts, also used for one AFE code variation.
- Single-ended (SE) (ex: VVREFP
= 3.0V)
- Gain = 1, LSB = (3.0V / 4096) = 732 μV
- Gain = 2, LSB = (1.5V / 4096) = 366 μV
- Gain = 4, LSB = (750 mV / 4096) = 183 μV
- Differential (DIFF) (ex: VVREFP = 3.0V)
- Gain = 1, LSB = (6.0V / 4096) = 1465 μV
- Gain = 2, LSB = (3.0V / 4096) = 732 μV
- Gain = 4, LSB = (1.5V / 4096) = 366 μV
The data include the AFE performances, as the PGA and AFE core cannot be separated. The temperature and voltage dependency are given as separate parameters.
Gain and Offset Errors
For:
- a given gain error: EG (%)
- a given ideal code (Ci)
- a given offset error: EO (LSB of 12 bits)
in 12-bit mode, the actual code (CA) is calculated using the following formula
For higher resolutions, the code can be extended to the corresponding resolution defined by RES.
Differential Mode
In Differential mode, the offset is defined when the differential input voltage is zero.
where:
- Full-scale error EFS =(EFS+)-(EFS-), unit is LSB code
- Offset error EO is the offset error measured for VIN=0V
- Gain error EG=100 × EFS /4096, unit in %
The error values in the tables below include the sample-and-hold error as well as the PGA gain error.
Single-ended Mode
The figure below illustrates the AFE output code relative to an input voltage VIN between 0V (Ground) and VVREFP. The AFE is configured in Single-ended mode by connecting internally the negative differential input to VVREFP/2. As the AFE continues to work internally in Differential mode, the offset is measured at VVREFP/2. The offset at VINP=0 can be computed using the transfer function and the corresponding EG and EO.
where:
- Full-scale error EFS =(EFS+)-(EFS-), unit is LSB code
- Offset error EO is the offset error measured for VREFP/2= 0V
- Gain error EG=100 x EFS /4096, unit in %
The error values in the tables below include the DAC, the sample-and-hold error as well as the PGA gain error.