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28/40/44-pin, Low-Power, High-Performance Microcontrollers

PIC18F27Q10 PIC18F47Q10

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17 Interrupt-on-Change
17.3 Block Diagram

Description
Core Features
Memory
Operating Characteristics
Power-Saving Operation Modes
Digital Peripherals
Analog Peripherals
Clocking Structure
Programming/Debug Features
PIC18F27/47Q10 Family Types
Packages
Pin Allocation Tables
1 Pin Diagrams
2 Device Overview
3 Guidelines for Getting Started with PIC18F27/47Q10 Microcontrollers
4 Device Configuration
5 OSC - Oscillator Module
6 Reference Clock Output Module
7 Power-Saving Operation Modes
8 (PMD) Peripheral Module Disable
9 Resets
10 WWDT - Windowed Watchdog Timer
11 Memory Organization
12 (NVM) Nonvolatile Memory Control
13 8x8 Hardware Multiplier
14 (CRC) Cyclic Redundancy Check Module with Memory Scanner
15 Interrupts
16 I/O Ports
17 Interrupt-on-Change
18 (PPS) Peripheral Pin Select Module
19 TMR0 - Timer0 Module
20 TMR1 - Timer1 Module with Gate Control
21 Timer2 Module
22 Capture/Compare/PWM Module
23 (PWM) Pulse-Width Modulation
24 ZCD - Zero-Cross Detection Module
25 CWG - Complementary Waveform Generator
26 CLC - Configurable Logic Cell
27 DSM - Data Signal Modulator Module
28 MSSP - Master Synchronous Serial Port Module
29 EUSART - Enhanced Universal Synchronous Asynchronous Receiver Transmitter
30 FVR - Fixed Voltage Reference
31 Temperature Indicator Module
32 (DAC) 5-Bit Digital-to-Analog Converter Module
33 (ADC²) Analog-to-Digital Converter with Computation Module
34 CMP - Comparator Module
35 (HLVD) High/Low-Voltage Detect
36 Register Summary
37 ICSP™ - In-Circuit Serial Programming™
38 Instruction Set Summary
39 Electrical Specifications
40 DC and AC Characteristics Graphs and Tables
41 Packaging Information
42 Appendix A: Revision History
Microchip Information

17.3 Block Diagram

Figure 17-1. Interrupt-on-Change Block Diagram (PORTA Example)

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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