8 Reset Structure

In the demo design, the reset signal is generated using the Reset_Block module. CoreReset_FF (CoreReset_PF) module releases active-low reset signal of TEST_INTERFACE, Mi-V subsystem, CPRI master, and slave subsystem when PLL_lock output from PF_CCC block, RESETN (External active-low signal), and DEVICE_INIT_DONE signal from INIT_MONITOR block are asserted.

The CoreReset_L0_TX (CoreReset_PF) module releases an active-low reset signal of the CPRI master subsystem and Test Interface when the RESETN (External active-low signal) and DEVICE_INIT_DONE signals from the INIT_MONITOR block are asserted.

The CoreReset_L0_RX (CoreReset_PF) module releases an active-low reset signals of the CPRI master subsystem when RESETN (External active-low signal) and DEVICE_INIT_DONE signals from the INIT_MONITOR block are asserted.

The CoreReset_L1_TX (CoreReset_PF) module releases an active-low reset signal of the CPRI slave subsystem when the RESETN (External active-low signal) and DEVICE_INIT_DONE signals from the INIT_MONITOR block are asserted.

The CoreReset_L1_RX (CoreReset_PF) module releases an active-low reset signal of the CPRI slave subsystem when the RESETN (External active-low signal) and DEVICE_INIT_DONE signals from the INIT_MONITOR block is asserted.

The INIT_MONITOR releases the active-low signal of XCVR_subsystem reset signals (PMA_ARST_N and PCS_ARST_N) when the XCVR_INIT_DONE signal from the INIT_MONITOR block is asserted.

DEVICE_INIT_DONE and XCVR_INIT_DONE signals are asserted when the device initialization is complete. For more information about device initialization, see PolarFire Family Power-Up and Resets User Guide .

For more information on CoreReset_PF IP core, see CoreReset_PF from the Libero catalog.

The following figure shows the reset structure in the demo design.