15.6.1 Interrupt Enable Clear
This register allows the user to disable an interrupt without doing a read-modify-write operation.
Changes in this register will also be reflected in the Interrupt Enable Set (INTENSET) register.
| Name: | INTENCLR |
| Offset: | 0x04 |
| Reset: | 0x00000000 |
| Property: | Local Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| VDDIO2LPMPOR | VDDIO2OK | VLM | BODVDDRDY | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
Bit 5 – VDDIO2LPMPOR VDDIO2 Low-Power Mode POR Interrupt Enable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit clears the VDDIO2LPMPOR
interrupt enable.
This bit will read as the current value of the VDDIO2LPMPOR interrupt enable.
Bit 4 – VDDIO2OK VDDIO2OK Interrupt Enable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit clears the VDDIO2OK interrupt
enable.
This bit will read as the current value of the VDDIO2OK interrupt enable.
Bit 3 – VLM Voltage Level Monitor Interrupt Enable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit clears the Voltage Level Monitor
interrupt enable.
This bit will read as the current value of the Voltage Level Monitor interrupt enable.
Bit 0 – BODVDDRDY BODVDD Ready Interrupt Enable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit clears the BODVDD Ready interrupt
enable.
This bit will read as the current value of the BODVDD Ready interrupt enable.