27.4.2.1.2 Output Pin Configuration

To use pin Pxn as an output, bit n in the Data Direction register (DIR) must be ‘1’. The pin is driven low or high according to the bit setting in the Data Output Value register (OUT). If bit n in OUT is written to ‘1’, pin n is driven HIGH. If bit n in OUT is written to ‘0’, pin n is driven LOW.

In this totem-pole (push-pull) configuration, there is no current limitation for sink or source other than what the pin is capable of.

Figure 27-5. I/O Configuration - Totem Pole Output With Disabled Input

Figure 27-6. I/O Configuration - Totem Pole Output With Enabled Input

When the corresponding bit in the DIR register is ‘0’ and the Pull Enable bit in the Pin Configuration register (PINCFG[n].PULLEN) is ‘1’, the pin is pulled high when the bit setting in the OUT register is written to ‘1’.

This high-impedance configuration ensures the pin does not float and maintains a defined logic level unless overridden by an external driver.

Note: Enabling the output driver will automatically disable pull.

Figure 27-7. I/O Configuration - Output With Programmable Pull