11.6.6 APB Bridge A Mask
| Name: | APBAMASK |
| Offset: | 0x14 |
| Reset: | 0x000007FF |
| Property: | PAC Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| EIC | RTC | WDT | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 1 | 1 | 1 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| GCLK | SUPC | OSC32KCTRL | OSCCTRL | RSTC | MCLK | PM | PAC | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bit 10 – EIC EIC APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the External Interrupt Controller peripheral (CLK_EIC_APB) is disabled |
| 1 | CLK_EIC_APB is enabled |
Bit 9 – RTC RTC APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the Real-Time Clock peripheral (CLK_RTC_APB) is disabled |
| 1 | CLK_RTC_APB is enabled |
Bit 8 – WDT WDT APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the Watchdog Timer peripheral (CLK_WDT_APB) is disabled |
| 1 | CLK_WDT_APB is enabled |
Bit 7 – GCLK GCLK APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the Generic Clock Controller peripheral (CLK_GCLK_APB) is disabled |
| 1 | CLK_GCLK_APB is enabled |
Bit 6 – SUPC SUPC APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the Supply Controller peripheral (CLK_SUPC_APB) is disabled |
| 1 | CLK_SUPC_APB is enabled |
Bit 5 – OSC32KCTRL OSC32KCTRL APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the 32.768 kHz Oscillators Controller peripheral (CLK_OSC32KCTRL_APB) is disabled |
| 1 | CLK_OSC32KCTRL_APB is enabled |
Bit 4 – OSCCTRL OSCCTRL APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the Oscillators Controller peripheral (CLK_OSCCTRL_APB) is disabled |
| 1 | CLK_OSCCTRL_APB is enabled |
Bit 3 – RSTC RSTC APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the Reset Controller peripheral (CLK_RSTC_APB) is disabled |
| 1 | CLK_RSTC_APB is enabled |
Bit 2 – MCLK MCLK APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the Main Clock peripheral (CLK_MCLK_APB) is disabled |
| 1 | CLK_MCLK_APB is enabled |
Bit 1 – PM PM APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the Power Management peripheral (CLK_PM_APB) is disabled |
| 1 | CLK_PM_APB is enabled |
Bit 0 – PAC PAC APB Clock Enable
| Value | Description |
|---|---|
| 0 | The APB clock for the Peripheral Access Controller peripheral (CLK_PAC_APB) is disabled |
| 1 | CLK_PAC_APB is enabled |