24.4.2.7 Event Generators

Each event channel can be configured to receive events from a specific event generator by writing to the Event Generator bit field in the Channel n Control register (CHANNEL[n].EVGEN). By default, all channels are disabled, meaning they are not connected to any event generator (CHANNEL[n].EVGEN is ‘0’).

For further details on event generation, refer to the Events section in the event generator’s peripheral chapter.

The table below shows the available event generators for this device family.

Table 24-2. Event Generators
Generator Name		Description	Event Type	Generating Clock Domain	Length of Event
Peripheral	Event	Description	Event Type	Generating Clock Domain	Length of Event
OSC32KCTRL	CLKFAIL	XOSC32K Failure	Level	OSC32K	As long as INTFLAG.CLKFAIL is set
SUPC	MVIO	The voltage level on VDDIO2 is insufficient for communication	Level	CLK_SUPC_APB	As long as INTFLAG.VDDIO2OK is set
SUPC	VLM	Voltage Level Monitor is triggered	Level	CLK_SUPC_APB	As long as INTFLAG.VLM is set
RTC	OVF	Overflow	Pulse	CLK_RTC_APB	One CLK_RTC_APB period
	CMP_n	MODE0/MODE1: Compare n MODE2: Alarm n	Pulse	CLK_RTC_APB	One CLK_RTC_APB period
	PER_n	Period Interval n	Pulse	CLK_RTC_APB	One CLK_RTC_APB period
EIC	EXTINT_n	External Interrupt Event Output	Pulse	CLK_EIC_APB	One CLK_EIC_APB period
DMAC	CH_n	Transfer on channel n is complete	Pulse	CLK_DMAC_AHB	One CLK_DMAC_AHB period
TCn	OVF	Overflow/Underflow	Pulse	GCLK_TCn	One GCLK_TCn period
TCn	MC_n	Match/Compare n	Pulse	GCLK_TCn	One GCLK_TCn period
TCCn	OVF	Overflow/Underflow	Pulse	GCLK_TCCn	One GCLK_TCCn period
	TRG	Trigger	Pulse	GCLK_TCCn	One GCLK_TCCn period
	CNT	Count	Pulse	GCLK_TCCn	One GCLK_TCCn period
	MC_n	Match/Compare n	Pulse	GCLK_TCCn	One GCLK_TCCn period
ADCn	RESRDY	Result Ready	Pulse	CLK_ADCn_APB	One CLK_ADCn_APB period
	SAMPRDY	Sample Ready	Pulse	CLK_ADCn_APB	One CLK_ADCn_APB period
	WCMP	Window Compare	Pulse	CLK_ADCn_APB	One CLK_ADCn_APB period
ACn	COMP_n	Comparator n status	Level	Asynchronous	While COMPn-OUT is ‘`1`’
ACn	WIN_n	Window n inside/outside status	Level	Asynchronous	While the input signal is inside window n
CCL	LUTOUT_n	LUT Out n	Level	Asynchronous	As long as OUT is ‘`1`’
PAC	ACCERR	Access Error	Level	CLK_PAC_APB	As long as a interrupt flag is set